JFET inputs, low input bias & offset current, (15nV/MHz & 0.01%)
Description
These circuits are high speed JFET input single operational amplifiers incorporating well matched, high voltage JFET and bipolar transistors in a monolithic integrated circuit.
The devices feature high slew rates, low input bias and offset currents, and low offset voltage temperature coefficient.
Key Features
- Internally adjustable input offset voltage
- Low power consumption
- Wide common-mode (up to VCC+) and differential voltage range
- Low input bias and offset current
- Output short-circuit protection
- High input impedance JFET input stage
- Internal frequency compensation
- Latch up free operation
- High slew rate 16 V/µs (typical)
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